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System Vision Design > 320x240 Pixel Chip using Dynamic Logic Circuits
320x240 Pixel Chip using Dynamic Logic Circuits
Summary
We reduced transistors in the pixel circuit using dynamic logic and implemented 320x240 pixels in 9.22mm x 8.52 mm chip, This is the biggest size among vision chips that perform digital processing.
Reference
- Takashi Komuro, Atsushi Iwashita, Masatoshi Ishikawa: A QVGA-size Pixel-parallel Image Processor for 1,000-fps Vision, IEEE Micro, vol. 29 no. 6, pp. 58-67 (2009)